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- Design the following combinational logic circuit with a four-bit input and a three-bit output. The input represents two unsigned 2-bit numbers: A1 A0 and B1 B0. The output C2 C1.C0 is the result of the integer binary division A1 A0/B1 B0 rounded down to three bits. The 3-bit output has a 2-bit unsigned whole part C2 C1 and a fraction part CO. The weight of the fraction bit CO is 21. Note the quotient should be rounded down, i.e. the division 01/11 should give the outputs 00.0 (1/3 rounded down to 0) not 00.1 (1/3 rounded up to 0.5). A result of infinity should be represented as 11.1. A minimal logic implementation is not required. (Hint: start by producing a truth table of your design).Q1/The binary number ( 1011011011011.1110111001101)= ( ) in octal number *I was able to fill out the truth table for part A. I ONLY need help for PART B. B) Implement the logic function (z) using the multiplexer 74HC151 shows in the picture.
- 7. Implement the logic function shown in following table by using a 74HC151. Write out expression for each data input from D0-D7, draw out circuit. EN MUX 74HC151 L Inputs A B C D 0000 0001 0010 0011 Output X 0 1 0 0100 0 0101 0 0110 0111 1 1000 1 0 1 0 1001 1010 1011 1100 1 1101 1 1110 0 1111 17. Read the following table, and design a logic circuit that can convert the binary code from BCD8421 to 2421. Decimal Digit BCD 8421 2421 0000 0000 1 0001 0001 2 0010 0010 3 0011 0011 4 0100 0100 5 0101 1011 0110 1100 7 0111 1101 1000 1001 8 1110 9 1111 1010 0101 Unused 1011 0110 bit 1100 0111 combi- 1101 1000 nations 1110 1001 1111 1010 Fig 123. The binary number 101110101111010 can be written in octal as a. 515628 b. 565778 c. 656278 d. 565728
- Find the output (F) of the logic circuit shown in figure below, for inputs A= 110011 B=010101 C=000111Exercises : Convert the following binary numbers to Hexadecimal numbers: (b) 1100111010002 (a)11001010010101112 (c) 101010. 101012 (d) 1111110001.011010012 0110111012 (e) 1011001110. Answers:In this assignment, you are required to design a circuit that counts and displays the sequence of the number 010430011092 . The number will then be displayed on a 7-segment display and changed every 1 second. The block diagram is as shown in Figure 1. Construct your design as follow: - (a) Design a combinational logic circuit that converts binary number to a sequence of the number 010430011092 and to be displayed on a single common anode 7-segment display. The logic circuit must be designed using 2-input NAND gate
- Logic Design courses / EE200SP21 / General / Mid Term Examination Part II (Subjecti Compute the minimal products of sum and minimal sum of products expressions for following KMAP. Show your groupings on KMAP АВ CD 1 1 1 1 0. Instructions: You have to solve the answer by hand on paper, scan/take photo and upload it as a single file. Local Disk (D:) Mid Term Examinat.Build a truth table and draw the output wave form for the following logic gates shown in Figure Q2. A o B Co Do E o D D Figure Q2 ZB) Draw the logic circuit for each of the following: 1) The operation 10110110 10101001