& Consider the following part of code: always@ (posedge clk) begin b <= a; C <= b; end If initially, a=1 and b-0, what will be the value of c on the next positive edge clock? a) o b) 1 c) x d) z e) Cannot be determined

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This QUESTION FROM ADVANCED DIGITAL SYSTEMS DESIGN course.

8 Considerthe following part of code:
always @ (posedge clk )
begin
b<= a;
C <= b;
end
If initially, a=l and b=0, what will be the value of con the next positive edge clock?
a) 0
b) 1
c) x
d) z
e) Cannot be determined
9- Considerthe following part of code:
initial
begin
clock = 1'b0:
repeat (30)
# 1 clock = -clock;
end
If each time step represents1 ms, what is the frequency of the clock ?
a) 30 Hz
b) 60 Hz
c) 300 Hz
d) 50 Hz
e) None of the given
10-What does the following code best represent ?
always @ (posedge clk )
begin
if (reset)..
end
a) An Asynchronous reset
b) A synchronous reset
c) A clock
d) AD type flip flop
11- Which loop is used to execute a fixed number of iteration ?
a) always @( )
b) foreverloop
c) repeat
d) always
Page 4 of 8
AAO-P10-R01 3 30/9/2018
Transcribed Image Text:8 Considerthe following part of code: always @ (posedge clk ) begin b<= a; C <= b; end If initially, a=l and b=0, what will be the value of con the next positive edge clock? a) 0 b) 1 c) x d) z e) Cannot be determined 9- Considerthe following part of code: initial begin clock = 1'b0: repeat (30) # 1 clock = -clock; end If each time step represents1 ms, what is the frequency of the clock ? a) 30 Hz b) 60 Hz c) 300 Hz d) 50 Hz e) None of the given 10-What does the following code best represent ? always @ (posedge clk ) begin if (reset).. end a) An Asynchronous reset b) A synchronous reset c) A clock d) AD type flip flop 11- Which loop is used to execute a fixed number of iteration ? a) always @( ) b) foreverloop c) repeat d) always Page 4 of 8 AAO-P10-R01 3 30/9/2018
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