Consider the following assumptions: Size of virtual address: 64 bits Size of physical address: 40 bits Page size: 4 KB Size of meta data per page table entry: 8 bits What is the size of the page table for this system?
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- Consider the main memory size of 128 kB, Cache size of 16 kB, Block size of 256 B with Byte addressable memory. What is the physical address split for 2-way, 4-way and 8-way set associative?A system has 4-kB pages, a 48-bit virtual address space, and a 33-bit physical address space. Assuming that page tables contain only physical page numbers--that is, no meta-data--that it is implemented as a simple lookup table, and that physical page numbers are packed into the smallest number of 8-bit bytes that can hold them (there may be wasted bits at each entry), how many bytes of memory are required to hold the entire page table? Please enter your answer in bytes.Consider a virtual memory system with a 50-bit logical address and a 38-bit physical address. Suppose that the page/frame size is 16K bytes. Assume that each page table entry is 4 Bytes. a. How many frames are in the systems? a.How many pages in the virtual address space for a process? b. If a single-level page table is deployed, calculate the size of the page table for each process c. Design a multilevel page table structure for this system to ensure that each page table can fit into one frame. How many levels is needed? Draw a figure to show your page systems;
- Suppose you have a byte-addressable virtual address memory system with 16 virtual pages of 64 bytes each and 4-page frames. Assuming the following page table, answer the questions below: Page # Frame # Valid bit 0 2 1 1 3 1 2 - 0 3 0 0 4 1 1 5 - 0 6 - 0 7 - 0 a) Show the virtual address format, including the name and size of the fields. b) Show the physical address format, including the name and size of the fields. c) What physical address corresponds to the virtual address 0x00? Answer should be in hexadecimal number. (if the address causes a page fault, answer as "page fault" with the proper explanation) d) What physical address corresponds to the virtual address 0x42? Answer should be in hexadecimal number. (if the address causes a page fault, answer as "page fault" with the proper explanation) e) What physical address corresponds to the virtual address 0x72? Answer should be in hexadecimal number. (if the address causes a page fault, answer as "page…Consider a virtual memory system with a 50-bit logical address and a 38-bit physical address. Suppose that the page/frame size is 16K bytes. Assume that each page table entry is 4 Bytes. a. How many frames are in the systems? How many pages in the virtual address space for a process? b. If a single-level page table is deployed, calculate the size of the page table for each process. c. Design a multilevel page table structure for this system to ensure that each page table can fit into one frame. How many levels do you need? Draw a figure to show your page systems;Suppose a byte-addressable computer using set associative cache has 216 bytes of main memory and a cache of 32 blocks, and each cache block contains 8 bytes. a) If this cache is 2-way set associative, what is the format of a memory address as seen by the cache, that is, what are the sizes of the tag, set, and offset fields? b) If this cache is 4-way set associative, what is the format of a memory address as seen by the cache?
- Suppose a byte-addressable computer using set associative cache has 2^24 bytes of main memory and a cache size of 64K bytes, and each cache block contains 32 bytes. a) If this cache is 2-way set associative, what is the format of a memory address as seen by the cache, that is, what are the sizes of the tag, set, and offset fields? b) If this cache is 4-way set associative, what is the format of a memory address as seen by the cache?Computer Science Explain in detail the steps in translating a 24-bit Virtual Address to a 32-bit Physical Address in a system with a two-level page table where the page directory is 32 entries and the size of each page table is 512 entries. Include the length of the bit fields that make up the Virtual Address and the Physical address.Computer Science Please explain in detail the steps in translating a 24 bit virtual address to a 32 bit physical address in a system with a two-level page table where the page directory is 32 entries and the size of each page table is 512 entries. Include the length of the bit fields that make up the virtual address and the physical address.
- Question 16 Suppose we have a virtual address space of 8 kilobytes (KB), a physical memory size of 6 kilobytes (KB) that uses byte addressing, and a page. size of 3 kilobytes (KB). There is no cache in the system. What are the sizes of the page and offset fields in the virtual address? a. page field; 3 bits and offset field: 10 bits b. page field: 2 bits and offset field: 11 bits c page field: 10 bits and offset field: 3 bits d. page field: 8 bits and offset field: 4 bits e. None of the other answers.Suppose a byte-addressable computer using set associative cache has 4Mbyes of main memory and a cache of 64 blocks, where each cache block contains 8 bytes. a) If this cache is 2-way set associative, what is the format of a memory address as seen by the cache, that is, what are the sizes of the tag, set, and offset fields? b) If this cache is 4-way set associative, what is the format of a memory address as seen by the cache? Show all work and explain how you got the answers please. Thanks9. Consider a system that uses 32-bit addresses and page table structures as discussed in class. If the address space of a process contains exactly 256 pages, what is the minimum number of pages that might be needed for its page table structure? What is the maximum number that might be needed? Briefly explain your answer.