Design Problem 1 Design a sequential circuit with input M and output A using the given state diagram. Reduce the number of states if necessary. Implement the circuit using SR flip-flops. Notes: • Use chronological binary assignment for the states (e.g. state A = 0000, B = 0001, D= 0010 etc.) • Use Q1, Q2, Q3, Q4 etc. as flip-flop variables where Q1 holds the MSB. 1/0 1/0 0/0 d 0/0 1/1 1/0 1/1 b 0/1 a 1/1 0/1 0/0 1/1 h 0/1 1/1 Answer the following 1. How many SR flip-flops are needed in the design? Note: For numbers 2 to 8 • Type N/A if not applicable Use upper case letters, it is case sensitive Use apostrophe to indicate complemented variable For every term in the expression, follow the sequence of the alphabet, e.g., AM Q1 In case of Q1, Q2, Q3, Q4..., arrange it in ascending order, e.g. Q2'Q4 2. The input equation to SR flip-flop, SQ1 = 3. The input equation to SR flip-flop, RQ1 = 1/0
Design Problem 1 Design a sequential circuit with input M and output A using the given state diagram. Reduce the number of states if necessary. Implement the circuit using SR flip-flops. Notes: • Use chronological binary assignment for the states (e.g. state A = 0000, B = 0001, D= 0010 etc.) • Use Q1, Q2, Q3, Q4 etc. as flip-flop variables where Q1 holds the MSB. 1/0 1/0 0/0 d 0/0 1/1 1/0 1/1 b 0/1 a 1/1 0/1 0/0 1/1 h 0/1 1/1 Answer the following 1. How many SR flip-flops are needed in the design? Note: For numbers 2 to 8 • Type N/A if not applicable Use upper case letters, it is case sensitive Use apostrophe to indicate complemented variable For every term in the expression, follow the sequence of the alphabet, e.g., AM Q1 In case of Q1, Q2, Q3, Q4..., arrange it in ascending order, e.g. Q2'Q4 2. The input equation to SR flip-flop, SQ1 = 3. The input equation to SR flip-flop, RQ1 = 1/0
Chapter22: Sequence Control
Section: Chapter Questions
Problem 6SQ: Draw a symbol for a solid-state logic element AND.
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