Due to availability of NAND gate ICs only, design a digital logic circuit for the following functions. Circuit designed using EPIS is considered as the correct answer: F1 =Em (1,3,7,9,11) + Ed (0,8,12,13). F2 =Em (1,3,5,6,8,10,12,15) + Ed (0,11,14).
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- logic circuit diagram for fabinaaci counter that gives output in fabinaaci sequence.upto 2 digits please mentions the gates and ics used in circuit.VBE (on=Vac (RA) = 0.7V, V (sat) = 0.8V, Ve (sat= 0.15V,Vp (0n)=0.3V, 0 = 0.85, B = 0.25 %3D SED Q4. Open collector logic gate is shown in Figure. What logic function is performed by this circuit? | R F B O a. A B O b. A B A B O d. А. В O e. A· B А. В(a) Consider the flipflop circuits below: (i) Name the 2 circuits given in the figure. Explain how they are different from each other. a. b. (ii) Choose from the list the input that triggers data to travel to the next flipflop in a counter. A: Input at top NAND gate B: Input at bottom NAND gate C: Clock input clk Q
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- Below is an example of an NMOS logic circuit. For all of the MOSFETs in the circuit below, assume V = 1 V and k = 50 mA/V². th W R₂ = 5600 PEETHIPPIN R₁ - 4700 M3 M₁ M. 0 a. Indicate and verify the state of each MOSFET and V for the following input combinations. Fill-out the table below for each assumed state of the MOSFET for every input combination. Use R approximation for linear operation and three significant ds(on) figures for the voltages. 오 Ao SV whyd) Draw the schematics of 4-bit synchronous and asynchronous MOD-8 counters and comment on their pros and cons. e) Calculate the noise margin for a logic gate with the following logic levels: VIL = 1.1 V, VIH = 3.2 V, VOL = 0.6 V, VOH = 4.0 V.1. What is the total or equivalent resistance of ten (10) nos of 10-ohm resistors connected in parallel? 2. A single logic gate in a prototype integrated circuit is found to be capable of switching from the “on” state to the “off” state in 12 ps. This corresponds to: a. 1200ns b. 1.2 ns c. 12000 ns d. 120 ns