Explain how the circuit shown in Figure 10 can be modified to create a 4-bit parallel in serial out register. Data input CLK FF2 00000 FF1 Figure 10 FF3 FF4 Data output
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- Consider the following runtime stack: BEFORE 00001000 00000006 ESP 00000FFC 00000FF 8 00000FF 4 00000FF0 What would be the value of ESP after pushing the 32-bit value shown below onto the stack? 000000A5 O 00001020 O 00000FF8 O 00000FFC O 000000A5What is the hexadecimal value stored in Register A after the following assembler has executed? LDA #0x71 NOTA NOTA LDR B,#0x71 ADC A,B LDR B,#0xEB ADC A,B NOTA LDR B,#0xD5 ADC A,B LDR B,#0x53 SBC A,B LDR B,#0x19 SBC A,B LDR B,#0x5E SBC A,BQ1. Show the implementation of 4 bit binary to gray code (shown in below table) converter using either EPROM or PLA. In Gray code only one bit changes at a time. Binary Gray code Decimal equivalent 0000 0000 1 0001 0001 0010 0011 3 0011 0010 4 0100 0110 5 0101 0111 6. 0110 0101 7 0111 0100 8. 1000 1100 1001 1101 10 1010 1111 11 1011 1110 12 1100 1010 13 1101 1011 14 1110 1001 15 1111 1000
- parity generator design, construct and test a circuit that generates an even parity bit ffrom four messages bits . use XOR gates. adding one more XOR gate, expand the circuit so that it generates an odd parity bit also.Q3) A - Convert the Excess-3 to binary number : ( 110001011100.10001010)ex-3 B- convert each Gray code to binary: 1-( 011010001001)G 2-(59)DThe upper 16 -bit binary count value are displayed on the four seven -segemnt displays as four hexadecimal digits. Hexadecimal values aren't good for human perception. How would you suggest the counter design be modified so that only decimal count values are displayed.
- 14.) Using rising edge JK-Flipflops and Digital Logic Gates, build a 4-Stage Shift Register. I recommend labeling D0, Q0, Q1, etc. Based on the waveforms for the CLK (clock) and D0 input generate the waveforms for Q0, Q1, Q2, Q3. DO CLK QO Q1 Q2 Q3Below is a 4-bit up-counter. What is the largest number of the counter if the initial state Q 3 Q 2 Q1Q0 =0011? (D 3 an Q 3 are MSB, and when Load = 1 and Count =1 the counter is loaded with the value D 3 ...D0) 4-bit counter Clock Q3 Load Count "I" or Vcc "I" or Vcc Do "1" or Vcc - D, Qi Q2 "0" or Gnd - D2 "0" or Gnd D3 Q3 1111 0011 1100 0110b) There are five binary or hexadecimal numbers and six decimal conversions. Draw a line to connect each binary/hexadecimal to decimal number. Binary/Hexadecimal Decimal 4E 78 11011010 157 10011101 167 A7 25 19 218
- (c) Figure Q3(c)(i) shows a register and Figure Q3(c)(ii) shows the input waveforms (CLOCK and Data in) to the circuit. A1 A9 A10 A2 Function generator A3 A11 A12 AS A13 A6 A14 A7 A15 Data in Bop.7) ip.r 82p.7) Logic analyser U1 U2 U3 U4 UO 6. 1. 6 1 6 INVERTER 3 CLK 3 CLK oCLK CLK 5 K K 5 K K 4027 Clock Function generator Figure Q3(c)(i) (i) Determine the type of register as shown in Figure Q3(c)(i).1. Gray code to Binary converter: Gray code is one of the codes used in digital systems. It has the advantage over binary numbers that only one bit in the code word changes when going from one number to the next. (See Table 1). Design a combinational circuit with 4 inputs and 4 outputs that converts a four- bit gray code number into an equivalent four-bit Binary number. Use Karnaugh map technique for simplification. Use LogicWorks for pre-lab demonstrations. Select the library "7400dev.clf* in the Parts Palette and then select the XOR chip 74-86. This would give you a set of 4 XOR's as shown in Fig. 1, just like the hardware chip 74-86. You could use as many as needed from these XOR gates in your design. Get back to ALL LIBRARIES and select switches for the inputs and Binary Probes as indicators of the outputs. Verify your design in the pre-Lab. During the Lab construct the circuit and verify its operations.1- Write an 8086 assembly language program to multiply the contents of the registers CL & BL by using repeated addition and store the result in AX. 2- Write a short sequence of instructions that subtracts the numbers in DI, SI, and BP from the AX register. Store the difference in register BX. 3- Write a short sequence of instructions that cube the 8-bit numbers found in DL. Load DL with a 5 initially, and make sure that your results is a 16-bit number. 4- Determine the contents of the registers and the carry flag after execution the following program: MOV AX, 5 MOV BL, 7 MOV CX, 4823H MUL BL ААМ OR AX, 3030H OR CX, 0600H AND CX, OFFFCH XOR CX, 1000Н ADD CH, CL 5- Determine the contents of the registers and the carry flag after execution the following рrogram: MOV AX, 198 MOV CX, 100 MOV DX, 0 DIV CX AAM ADD AX, 3030H MOV BX, AX XCHG AX, DX AAM ADD AX, 3030H