will allow overlapping of ions. After fetching the ning of the target instruction branch instruction. The au

Systems Architecture
7th Edition
ISBN:9781305080195
Author:Stephen D. Burd
Publisher:Stephen D. Burd
Chapter4: Processor Technology And Architecture
Section: Chapter Questions
Problem 15VE: A(n) ________________ instruction always alters the instruction execution sequence. A(n)...
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An instruction pipeline of 5 stages will allow overlapping of all the
instructions except branch instructions. After fetching the branch
instruction, the CPU stops the fetching of the target instruction until
completion of current executing branch instruction. The average
instruction execution time when CPU executes larger no. of
instruction with 20% branch instructions is
clocks.
Transcribed Image Text:An instruction pipeline of 5 stages will allow overlapping of all the instructions except branch instructions. After fetching the branch instruction, the CPU stops the fetching of the target instruction until completion of current executing branch instruction. The average instruction execution time when CPU executes larger no. of instruction with 20% branch instructions is clocks.
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