With the given Truth Table below, come up with or create a combinational logic gates and also, provide a code on Verilog/VHDL. Note: A and B are the two (2) INPUTS and Y is the OUTPUT. A B Y 000 1 0 1 0 1 1 0 1 1

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Verilog question

II.
With the given Truth Table below, come up with or create a combinational logic
gates and also, provide a code on Verilog / VHDL. Note: A and B are the two (2)
INPUTS and Y is the OUTPUT.
B
0 0 0
0
A
0|0|1|1
|1
1
0
1
1
Transcribed Image Text:II. With the given Truth Table below, come up with or create a combinational logic gates and also, provide a code on Verilog / VHDL. Note: A and B are the two (2) INPUTS and Y is the OUTPUT. B 0 0 0 0 A 0|0|1|1 |1 1 0 1 1
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